Publications on Software Engineering

Publications:

2009

Master Students: Eyal Halm, Advisor: Bart Kienhuis, "A Fast Cycle Accurate Multicore System Simulator in SystemC for Design Space Exploration", Master Thesis, LIACS, Aug 2009.

Abstract: Along the years, we see higher demands from embedded systems in terms of computing power. Modern applications require computing power that a single processor system will not be able to provide. As a result, embedded systems are becoming multi-core systems, in which multiple processors can each perform a smaller portion of the task. When implementing a multi-core embedded system, the challenge is to choose the best configuration out of many possible options. A trial-and-error approach in finding the best solution by implementing the system in hardware and then trying to fit it within time and platform constraints is not a desired solution. Instead, we present in this thesis the Genetic Algorithm DesiGn space Exploration Tool (GADGET), which performs design space exploration on multicore systems using a genetic algorithm. It is built on top of the ESPAM methodology that automatically transforms sequential C code into a parallel solution which can be run on a multi-core system. The genetic algorithm helps the system designer to find a Pareto front of solutions, from which the best solution can be chosen. A strong point of GADGET is that it describes multi-core systems in SystemC in both the TLM and RTL modeling style. Very accurate performance numbers are obtained as the MicroBlaze instruction set simulator has been transformed into a cycle accurate simulator within SystemC. We show case studies for the QRvr, Sobel and M_JPEG applications.

Master Students: Feraaz Imami, Advisor: Bart Kienhuis, "Simulation and Exploration of LAURA Processor Architectures with SystemC", Master Thesis, LIACS, July 2009.

Abstract: The COMPAAN/LAURA tool flow automatically maps digital signal processing applications onto reconfigurable platforms such as FPGAs. The COMPAAN tool generates a Kahn Process Network description for a program written in Matlab. For this KPN, Laura generates VHDL code that is synthesized into a description that programs the FPGAs; this synthesis step, however, takes a long time. Instead of using VHDL, we could also use SystemC as a new design methodology. It speeds up the design process as it allows for faster exploration of different implementations with almost the same accuracy as VHDL. SystemC is able to simulate faster as it raises the abstraction level at which hardware models are described. In this thesis, we created the IMASC tool that stands for Implementations of Multi-processor Architectures with SystemC. This tool automatically generates for all processes in a Kahn process networks, the cycle accurate models for the Read, Execute, and Write unit that make up the LAURA hardware processor model. We validated the correctness of these models and calibrated them against real hardware results for a couple of applications. We found over 99% accuracy with a factor 3 faster execution times compared to realizations in VHDL. We also show a simple design space exploration in which we study the effect of different levels of pipelining and we show how IMASC is used to simulate a heterogeneous KPN realization consisting of hardware and software components.

Master Students: Nadia Ramjiawan, Advisor: Bart Kienhuis, "Mapping Multiple Processes onto SPEs of the CELL BE Platform using the SCO Model of Computation", Master Thesis, LIACS, January 2009.

Abstract: The Cell Broadband Engine platform is a heterogeneous, distributed memory multiprocessor architecture consisting of a Power Processor Unit (PPU) and several Synergistic Processor Elements (SPE). The Cell platform supports pipeline parallelism making it very suitable for mapping streaming application. The Synergistic Processor Element implements a single-threaded processor model and is therefore limited to executing only a single task. This thesis present a model for mapping stream-processing applications on the Cell in such a way that it provides facilities to map multiple tasks on a Synergistic Processor Element of the Cell processor. This model is called the SCO model as it consists of a schedule, communicate, and observation phase. This SCO model is designed in the context of the Stream Based Function (SBF) dataflow model. Using a dataflow model instead of a threaded model, we are able to map multiple tasks on an SPE. We will present CellFlow, the compiler we developed that automatically converts Kahn Process Networks (KPN) generate by Compaan into the SCO model. This provides a complete compiler chain allowing us to program the Cell processor from a high-level language like C or Matlab code in a dataflow format.

2008

Master Students: Sven van Haastregt, Advisor: Bart Kienhuis, "Automated Synthesis of Hardware Process Networks from Sequential C code", Master Thesis, LIACS, August 2008.

Abstract: Embedded electronic devices are used on a very large scale in many different fields, like cell phones, DVD players or medical tomography systems for example. All have in common that microprocessors play an important role doing the necessary computations. In all fields, the demand for embedded compute power is continuously increasing leading to multi core solutions. Also, FPGAs are becoming very interesting compute platforms as it provides huge amount of customizable parallelism. However programming them is challenging limiting their usability. In this talk, we present a methodology for automated generation of complete hardware implementations on FPGAs from a single sequential C input specification. By exploiting the KPN Model of Computation (MoC), we can automatically obtain an implementation that fits well on FPGAs. Furthermore, by using the industrial high level synthesis tool from Synfora Inc., we can automatically generate efficient hardware implementations from a high level application specification by exploiting finer-grained parallelism. An important benefit of this approach is that no source code annotations are required for obtaining an efficient result. We will show in the talk that we obtain competitive results in matters of tens of minutes of design time instead of hours or even days.

2007

Master Students: Sander van der Maar, Advisor: Bart Kienhuis, "Tomography mapped onto the Cell Broadband Processor, A comprehensive survey using case studies", Master Thesis, LIACS, August 2007

Abstract: this document covers a project running from February to August 2007, during which we implemented a tomography algorithm (SART) in a few different ways and also set up a compiler that generated parallelized code for the IBM Cell. Here we give the background for this project and explain the used methods and algorithms. Also the found results are discussed.

Master Students: Arjen de Mooij, Advisor: Bart Kienhuis, "Graphview: KPN Visualization", Master Thesis, LIACS, August 2007

Abstract: Compaan is a compiler that automatically generates Kahn Process Networks (KPNs) from small sequential programs written in Matlab. A designer can maps these KPNs onto different compute platforms like FPGAs, the Intel IXP network processors, or the IBM Cell processor. Nevertheless, a KPN generated by Compaan contains lots of complex data and the designer may get overwhelmed by this amount of data. Therefore, to help the designer in the mapping process, we want to use visualization to organize the complex data present in KPNs. In this presentation, we present the Graphview editor that is a visualization tools for Kahn Process Networks (KPN). We build Graphview as an Eclipse plugin on top of the Graphical Editing Framework (GEF) as it allows developers to take an existing application model and quickly create a rich graphical editor. We will explain how we realized the Graphview editor and show results.

2006

Master Students: Johan Walters & David Snuijf, Advisor: Bart Kienhuis, "Mapping stream based applications to an Intel IXP Network Processor using Compaan ", Master Thesis, LIACS, September 2006

Abstract: Although we can build multiprocessor platforms like the IXP2400 but also FPGAs like the Virtex-II Pro, programming them is a tedious, slow and error-prone process. You need to write a couple of “C” programs for each processor that need to work together with other processes seamlessly using the communication infrastructure provided by the platform. To make programming the IXP simpler, we investigated in this thesis if it is possible to use the Compaan tool flow to program the IXP. The Compaan tool flow converts sequential Matlab programs into parallel running Kahn Process Networks (KPN). This flow is already used to program high-end FPGAs. We now want to investigate if we can use the Compaan flow to program the Intel IXP2400 Network Processor platform. This has lead to the development of the IMCA tool that performs an automatic mapping and implementation of a KPN specification onto the Intel IXP2400. In this Master Thesis we explain the IXP architecture in detail and explain what is required to map a KPN onto the IXP. We also explain how this mapping is realized inside the IMCA tool. Furthermore, we will present results obtain from mapping and running applications onto the IXP2400.

Master Student: Li Xu, Advisors: Bart Kienhuis (LIACS), Herbert Bos (VU), "CardGuard-2: A network intrusion detection and prevention system on network processors", Master Thesis, LIACS, January 2006

Abstract: CardGuard-2 is a software-based intrusion detection and prevention system that scans the entire Ethernet packets for suspicious patterns (signatures of worms, viruses, etc.). It is implemented on an Intel IXP2400 network processor based card that embeds a parallel hardware processing architecture (e.g. an XScale control processor, eight microengines and various memory types). This software system exploits the memory hierarchy of the card by storing frequently needed data in fast on-chip memory and keeping rarely accessed data in slower off-chip memory. It also supports an advanced regular expression algorithm for pattern matching by a parallelized implementation at the lowest level of the processing hierarchy. CardGuard-2 is capable of reassembling multiple TCP streams before applying the pattern matching engines. The system can be used to protect either a single host, or a small group of machines connected to a switch. An important feature of the system is that it is non-intrusive in the sense that no cycles of the host CPUs are used for intrusion detection and the system still operates at realistic link rates.

2005

Master Student: Sjoerd Meijer, Advisor: Bart Kienhuis,"A Process Splitting Transformation for Kahn Process Networks", Master Thesis, LIACS, October 2005

Abstract: In this master's thesis we present the process splitting transformation for Kahn Process Networks. Classical parallelization techniques and algorithms are used in the context of a parallel program specification, the so called Kahn Process Networks. This parallel program specification can be further analyzed and optimized, such that mapping the application onto a multi-processor architecture results in the desired runtime requirements. We will present a four-step transformation to come to a functionally equivalent Process Network, but with a changed network structure that exploits the architecture's processing units as efficiently as possible. The transformation is applied on a jpeg application showing results that justify its implementation in the open-source GCC compiler.

Master Student: Wei Wang, Advisor: Bart Kienhuis,``Using Eclipse as the Integrated Development Environment (IDE) for Compaan'' , Master Thesis, LIACS, August 2005

Abstract: In Embedded system architecture design, parallel programs are becoming more important. Normally the applications that need to run on these architectures are written in a sequential programming language like C, Java, or Matlab. Bridging the gap between sequential specifications and parallel specifications is nevertheless required. The Compaan compiler, developed in the group, is able to do this transformation automatically for a limited set of the sequential programming language. In this thesis presentation, we present how can integrate the Compaan compiler in an Integrated Development Environment (IDE) to make the use of Compaan easier. The IDE is built using the Eclipse Platform. This platform is a powerful extensible application development platform introduced to solve integration problems in programming environments. The Eclipse Platform acts as the glue to seamlessly bind different tools together and to provide various programming support features to the end user.

2004

Master Student: Jeroen Derwort, Advisor: Bart Kienhuis,``Online Soccer Manager Going Global'' , Master Thesis (ICT and Business), LIACS, August 2004

Abstract: Abstract: This study researches the going global of the Internet game Online Soccer Manager (OSM). OSM involves a game on the World Wide Web which relies on end-user payments. The Internet game was developed and exploited by the author of this paper. Prior to this study OSM had only been a Dutch game, available in the Netherlands and Belgium. GameBasics, the company now in possession of the rights for OSM abroad, is investigating the possibility of entering new countries. This study sought to aid this decision making process by introducing a framework model, the Webgame Framework, as a solution for evaluating potential markets. The Webgame Framework identifies four key issues that need to be covered when entering a foreign market: game concepts, online payments, community management and hosting & software. These four issues, placed in the market context, are considered of equal importance to make a webgame self-supporting in a particular country. The results of this study indicate that self-support for the website is achieved in the Netherlands and that the average income per website user can be calculated. It is also concluded that the Webgame Framework delivers a useful solution for evaluating potential markets for OSM. Four foreign markets were investigated: Germany, the United Kingdom, China and Japan. From these four, Germany has been identified as the best option. The United Kingdom is also a suitable market, but requires extra technical implementation. China and Japan are less suitable for entry: establishing a presence on these markets involves considerably more risk and investments in terms of Community Management, Hosting & Software, Online Payments and Game Concepts.

Master Student: Prashant Pandit, Advisor: Bart Kienhuis,``Feasibility of Rhapsody on Nexperia Home'' , Master Thesis, LIACS, August 2004

Abstract: Though Object-Orientation and Component Based Software Engineering are two of the main paradigms of software development today, much is yet to be standardized creating incompatiblities and undue complexities between different developers and independent software vendor parties. This complexity also increases in systems built with different architectures, processes and organization structure. Philips Semiconductors is hence looking for ways and means to make software development on their Nexperia Home platform more efficient. Rhapsody by I-Logix has a relatively new approach to developing software based on industry standards of UML and Model Driven Architecture. It is an object based modeling tool with support for UML and implementation of the UML models in C, C++ and Java. Nexperia Home is a component based software system and employs two different component models, Koala and tmCom. This thesis forms the groundwork for the merging of two frameworks viz. Rhapsody and tmCom. It thus forms a feasibility test for using Rhapsody as a software development tool for the Nexperia Home platform. The thesis presents a workflow for model-based development for NH platform using Rhapsody. Successful deployment of Rhapsody generated components together with conventionally built Nexperia Home components will emphasize the feasibility of Rhapsody as a next-generation software development tool for component based software systems.

Master Student: Gideon Liem, Advisor: Bart Kienhuis,``Increasing Quality in Software Production'' , Master Thesis, LIACS, April 2004

Abstract: Building and deploying quality software effectively is what every company focuses on. Testing software should be the measurement of software quality, not merely an error finding process. At AMB i.t. we have been exploring ways of improving the quality in commercial software production. This thesis focuses on introducing automated testing in a software development environment. It will hereby discuss the methods used to increase software quality, and will analyze the effects those methods have.

2003

Master Student: Andre van der Plas, Advisor: Bart Kienhuis,``Efficiently using foreign code; the combination of CVS and WebDAV'' , Master Thesis, LIACS, August 2003

Abstract: Foreign code is software that has been developed by software developers who are not taking part in the current software project. In a software project, in which foreign code is to be used, the software developers have to work with unknown code. If this foreign code is badly structured and of low quality, then using such code might prove to be very inefficient.
This thesis discusses an approach on how to restructure foreign code. The restructuring of foreign code is supported by an argumentation. This argumentation states the effect that restructuring has on decreasing the cost of changes. With the approach it is possible to turn foreign code of low quality, into code that allows itself to be used more efficiently.
The approach discussed in this thesis has been used to improve the quality and structure of a program called "JCVS". It has lead to the creation of a new program called "PromptJCVS".
PromptJCVS has been used to implement the idea for a new network system. This network system consists of the combination of WebDAV and CVS, and is also discussed in this thesis. In the system a WebDAV server is linked to a CVS server, which allows the functionality behind the WebDAV interface to be extended by offering additional CVS services.
This thesis discusses the theory behind the approach that is used for the restructuring of foreign code. But this thesis also shows how this approach, and its accompanying techniques, were used in practice. For the server combination of WebDAV and CVS there is not only a theory discussion, but also a section in which people are explained how to install this server system themselves.