[logo] Performance Critical Applications of Parallel Architectures (APPARC)

ESPRIT EC-DGIII Basic Research Project Number: 6634

Work Area: Parallel Computing and Architectures

APPARC consortium

Coordinator

Harry Wijshoff
Leiden University
Niels Bohrweg 1
2333 CA Leiden, the Netherlands

Contact person

Fred Bakker
Dept. of Computer Science
Leiden University
Niels Bohrweg 1
2333 CA Leiden
The Netherlands
phone: +31 71 5277042
fax: +31 71 5276985
email: bakker@cs.leidenuniv.nl

Keywords

Performance-Critical Components
Sparse Applications and Algorithms
Memory Organisation

Timetable

From 24/07/1992 to 24/09/1995

Synopsis

High performance computing is a critical technology for future economic growth. Technical progress in high performance computing has been rapid only in a few application areas. Unfortunately, a large and important class of applications is not yet amenable to high performance execution due to a mismatch with currently available techniques at all levels of the computational problem solving process. We refer to this class of computations as performance-critical applications. It requires a concerted interdisciplinary research effort to break this barrier. The APPARC project addresses this urgent research need.

Aims

Performance-critical applications typically involve manipulation of large, sparse discrete data objects. In our view, one of the major causes of low performance for these applications is the hardware memory organisation in present-day high performance computers. Progress towards general applicability of high performance computing depends upon the removal of this memory performance barrier for the class of sparse computations. Hence, sparse computations and hardware memory architecture, form the main technical themes of the APPARC project.

Approach and Methods

The development of computational solutions to performance--critical applications embraces many different levels of abstraction, from mathematical modelling of the application, through algorithm and software development, to hardware implementation. Hence, tackling the two project themes is not a simple matter: the interaction between the applications and the memory architecture affects all levels of the problem solving process. Consequently, the APPARC project intends to study the two themes across eight interrelated enabling areas, as follows: Performance-Critical Applications, Parallel Algorithms, Problem Solving Environments, Performance Modelling and Evaluation, High Level Languages, Compiler Design, Operating Systems, Hardware Architecture.

APPARC deliverables

The deliverables produced by the APPARC consortium as of yet are listed here.

Newsletter

Every three months the APPARC Newsletter is released. The purpose of this newsletter is to inform the research and industrial community at large about the progress being made within the APPARC consortium.

Released issues:

Related publications

The related publications describe research results obtained by the APPARC partners. More than 100 papers in journals and conference proceedings have been published. A list of these publications (with abstracts) is given in the Newsletters. For more information concerning these APPARC related publications the following persons serve as contact persons per partner:
Last modified on July 2, 1996 by Lex Wolters.