PME4b Abstract

Title: Performance Analysis of Multiprocessors Memory System (PME4b)

Authors: O. Temam

Email: Olivier.Temam@prism.uvsq.fr

Date: July 1994

Abstract:

The purpose of this paper is to study the feasibility of the performance evaluation and prediction of numerical codes in a multiprocessor environment. This work is divided into two complementary parts. First an experimental section for determining the average communication time of a data within a numerical loop nest for different types of communications. The purpose of this experimental section is also to quantify the notion of false sharing and moreover of data layout. In a second part, a formal framework is developed for estimating the amount of communication time for a given loop nest because of the initial data layout of the data. This framework relies on the experimental data gathered in the first part. It is shown that estimating the total communication time for a set of loop nests is a tractable task and has numerous applications (parallelization, software coherence).

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