Title: Performance Analysis Tools for SVM Architectures (OpS4b)
Authors: R. Berrendorf and T. Priol
Email: priol@irisa.fr
Date: July 1994
Abstract:
This deliverable describes performance analysis tools for distributed memory parallel architectures supporting a Shared Virtual Memory implemented by software. One of the main points in the collaboration between APPARC members is the design of a common trace file format (SVM Trace Format) to store events generated by the Shared Virtual Memory mechanism. IRISA implemented a translator to generate trace files with this new format from KOAN trace files. This allows us to carry out experiments both at IRISA and KFA. This format will be used in forthcoming SVMs such as MYOAN at IRISA and ASVM designed by Intel SSD at ESDC in Munich.
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Last modified on May 13, 1996 by J.H.M.Dassen.
(C) 1995 by Leiden University